DocumentCode :
2314877
Title :
Gate recessed (GR) MOSFET with selectively halo-doped channel and deep graded source/drain for deep submicron CMOS
Author :
Woo-Hyeong Lee ; Young June Park ; Jong Duk Lee
Author_Institution :
Dept. of Electron. Eng., Seoul Nat. Univ., South Korea
fYear :
1993
fDate :
5-8 Dec. 1993
Firstpage :
135
Lastpage :
138
Abstract :
A new recessed channel MOSFET, Gate Recessed MOSFET, is proposed to improve the reliability and the performance of deep submicron devices. GR-MOSFET is designed to have a lateral doping profile of S/D and channel gradually decreasing near both channel ends. This doping profile is obtained by selective doping of the channel and S/D without counter-doping and results in eliminating the tradeoff between DIBL (drain-induced barrier lowering) and hot carrier effects. The fabricated 0.25 /spl mu/m GR-MOSFET with 10 nm gate oxide has exhibited 15% higher transconductance, 10% increased saturation current at V/sub D/=V/sub G/=3.3V, 1 V higher BV/sub DSS/ and 6 times less substrate current compared with a LDD-MOSFET of the same effective gate length.<>
Keywords :
CMOS integrated circuits; doping profiles; insulated gate field effect transistors; integrated circuit technology; 0.25 micron; deep graded source/drain; deep submicron CMOS; drain-induced barrier lowering; gate recessed MOSFET; hot carrier effects; lateral doping profile; recessed channel device; selectively halo-doped channel; Doping profiles; Etching; Hot carrier effects; Impurities; MOS devices; MOSFET circuits; Oxidation; Reliability engineering; Substrates; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-1450-6
Type :
conf
DOI :
10.1109/IEDM.1993.347381
Filename :
347381
Link To Document :
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