An NPN 30 GHz, PNP 32 GHz f/sub T/ complementary bipolar technology

Author

Onai, T. ; Ohue, E. ; Idei, Y. ; Tanabe, M. ; Shimamoto, H. ; Washio, K. ; Nakamura, T.

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

63

Lastpage

66

Abstract

Fully symmetrical complementary bipolar transistors for low power-dissipation and ultra-high-speed LSIs have been integrated in the same chip using a 0.3-/spl mu/m SPOTEC process. Reducing the surface concentration of the boron by oxidation at the surface of boron diffusion layer suppressed upward diffusion of boron in the subcollector of the pnp transistor during epitaxial growth. This enabled thin epitaxial layer growth of both npn and pnp transistors simultaneously. Cutoff frequencies of 30 and 32 GHz were obtained in npn and pnp transistors, respectively. These results showed that the power dissipation is reduced to 1/4 in a complementary active pulldown circuit compared with an ECL circuit.<>

Keywords

VLSI; bipolar integrated circuits; epitaxial growth; integrated circuit technology; large scale integration; oxidation; 0.3 micron; 30 GHz; 32 GHz; SPOTEC process; boron diffusion; chip integration; complementary active pulldown circuit; complementary bipolar technology; cutoff frequencies; epitaxial growth; npn transistors; oxidation; pnp transistors; power-dissipation; surface boron concentration; symmetrical complementary bipolar transistors; ultra-high-speed LSIs; Bipolar transistors; Boron; Circuits; Cutoff frequency; Epitaxial growth; Epitaxial layers; Etching; Oxidation; Power dissipation; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347398

Filename

347398