An integrated PLL clock generator for 275 MHz graphic displays

A monolithic phase-locked loop (PLL) and clock generator/driver has been developed to provide clock frequencies up to 275 MHz from low-cost crystals for use with high-resolution RAMDACs (random-access-memory and digital-to-analog converters). Unlike previous integrated PLLs, this PLL clock generator simplifies video clock generation design since it requires no coils or varicaps. The internal capacitor for an emitter coupled multivibrator achieves high quality, with little coupling to the substrate. This integrated circuit incorporates all of the building blocks of a PLL, including a crystal amplifier which will work with a wide range of crystal frequencies. The only external components required are two resistors and two capacitors which operate at low loop filter frequencies. An innovative method of efficiently simulating PLLs was also developed