DocumentCode :
2315240
Title :
CMOS PWM VLSI implementation of neural network
Author :
Chen, Lu ; Shi, Bingxue
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume :
3
fYear :
2000
fDate :
2000
Firstpage :
485
Abstract :
A neural network VLSI implementation based on pulse width modulation is analyzed. A simple synapse multiplier is proposed, which has high precision and large linearity range. A voltage-mode sigmoid circuit with adjustable gain is analyzed, which is used for neuron activation functions. A voltage-pulse conversion circuit required for PWM is suggested, which has high conversion precision and linearity. On the basis of the above circuits, a PWM VLSI neural network to solve XOR problem is designed. The simulation result shows its correct function and fast speed, it is suitable for VLSI implementation of neural network
Keywords :
CMOS integrated circuits; VLSI; feedforward neural nets; neural chips; pulse width modulation; transfer functions; CMOS PWM VLSI implementation; XOR problem; large linearity range; neural network; neuron activation functions; pulse width modulation; synapse multiplier; voltage-mode sigmoid circuit; voltage-pulse conversion circuit; Artificial neural networks; Circuit noise; Circuit simulation; Linearity; Neural networks; Neurons; Pulse width modulation; Space vector pulse width modulation; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 2000. IJCNN 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on
Conference_Location :
Como
ISSN :
1098-7576
Print_ISBN :
0-7695-0619-4
Type :
conf
DOI :
10.1109/IJCNN.2000.861355
Filename :
861355
Link To Document :
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