DocumentCode
2315490
Title
Cascade: hardware for high/variable precision arithmetic
Author
Carter, Tony M.
Author_Institution
Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA
fYear
1989
fDate
6-8 Sep 1989
Firstpage
184
Lastpage
191
Abstract
The Cascade hardware architecture for high/variable precision arithmetic is described. It uses a radix-16 redundant signed-digit number representation and directly supports single or multiple precision addition, subtraction, multiplication, division, extraction of the square root, and computation of the greatest divisor. It is object-oriented and implements an abstract class of objects, variable precision integers. It provides a complete suite of memory management functions implemented in hardware, including a garbage collector. The Cascade hardware permits free tradeoffs of space versus time
Keywords
digital arithmetic; Cascade hardware architecture; addition; division; extraction; garbage collector; high/variable precision arithmetic; memory management functions; multiplication; object-oriented; radix-16 redundant signed-digit number representation; square root; subtraction; variable precision integers; Acceleration; Application software; Cities and towns; Computer architecture; Computer science; Cryptography; Digital arithmetic; Equations; Hardware; Memory management;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1989., Proceedings of 9th Symposium on
Conference_Location
Santa Monica, CA
Print_ISBN
0-8186-8963-3
Type
conf
DOI
10.1109/ARITH.1989.72825
Filename
72825
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