DocumentCode :
2315568
Title :
Digitally controlled boost converter with digital DLL based calibration
Author :
Jen-Hou Wu ; Shao-Ku Kao
Author_Institution :
Dept. of Electr. Eng., Chang Gung Univ., Taoyuan, Taiwan
fYear :
2013
fDate :
22-25 April 2013
Firstpage :
541
Lastpage :
545
Abstract :
This paper presents the digitally controlled boost converter with delay-locked loop (DLL) to enhance the resolution. We propose two novel circuits: all digital ramp generator for coarse tuning and DPWM with build-in DLL for calibration. This circuit is designed in 0.35μm CMOS process. The input voltage range is from 3.3V to 4.2V with output voltage of 5V. The maximum efficiency is 90% at loading current to be 500 mA.
Keywords :
CMOS integrated circuits; PWM power convertors; delay lock loops; digital control; power convertors; CMOS process; DPWM; all digital ramp generator; coarse tuning; current 500 mA; delay locked loop; digital DLL based calibration; digitally controlled boost converter; efficiency 90 percent; size 0.35 mum; voltage 3.3 V to 4.2 V; voltage 5 V; Calibration; Clocks; Detectors; Generators; Radiation detectors; Tuning; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics and Drive Systems (PEDS), 2013 IEEE 10th International Conference on
Conference_Location :
Kitakyushu
ISSN :
2164-5256
Print_ISBN :
978-1-4673-1790-0
Electronic_ISBN :
2164-5256
Type :
conf
DOI :
10.1109/PEDS.2013.6527078
Filename :
6527078
Link To Document :
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