• DocumentCode
    2315984
  • Title

    A dynamically tracking clock distribution chip with skew control

  • Author

    Chengson, Dave ; Costantino, Lino ; Khan, Aurangzeb ; Le, Duc ; Yue, Lordson

  • Author_Institution
    Tandem Comput. Inc., Cupertino, CA, USA
  • fYear
    1990
  • fDate
    13-16 May 1990
  • Abstract
    A novel single-chip clock distribution circuit is described. This circuit is a self-calibrating synchronization system that receives a periodic, digital clock signal as a reference and generates multiple system clock signals that dynamically track and are synchronized to the reference clock across temperature, voltage, and process variations. This chip is used as an integral part of the clock distribution for a fault-tolerant computer system. Results from ATE and bench testing of this clock chip are presented. The edge rate, granularity, pin-to-pin skew, ASIC to nonASIC delay line, and clock jitter characteristics are verified to exceed collectively the specifications of commercially available products
  • Keywords
    bipolar integrated circuits; clocks; digital integrated circuits; emitter-coupled logic; fault tolerant computing; integrated circuit testing; synchronisation; transistor-transistor logic; ASIC to nonASIC delay line; bench testing; clock chip; clock jitter characteristics; dynamically tracking clock distribution chip; edge rate; fault-tolerant computer system; generates multiple system clock signals; granularity; pin-to-pin skew; reference clock; self-calibrating synchronization system; single-chip clock distribution circuit; skew control; Circuits; Clocks; Distributed computing; Fault tolerant systems; Signal generators; Signal processing; Synchronization; Temperature; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
  • Conference_Location
    Boston, MA
  • Type

    conf

  • DOI
    10.1109/CICC.1990.124747
  • Filename
    124747