DocumentCode
2316102
Title
Co-Verification of Networked Embedded System
Author
Damle, Nikhil S. ; Keskar, A.G.
Author_Institution
Dept. of Electron. & Comput. Sci. Eng., Visvesvaraya Nat. Inst. of Technol. Nagpur, Nagpur
fYear
2008
fDate
16-18 July 2008
Firstpage
1340
Lastpage
1344
Abstract
The paper gives an insight to the verification of hardware/software Codesign of embedded systems by considering the network component commonly seen in the todaypsilas embedded systems. The approach tries to provide a verification platform for networked embedded system. Virtual system modeling of networks & their interaction with hardware-software is the key issue in the heterogeneous co-simulation of networked embedded system.
Keywords
embedded systems; formal verification; hardware-software codesign; co-verification; embedded systems; hardware/software codesign; networked embedded system; virtual system modeling; Application software; Computer applications; Embedded computing; Embedded software; Embedded system; Hardware; Operating systems; Paper technology; Software performance; Timing; Co-simulation; networked embedded system heterogeneous;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Trends in Engineering and Technology, 2008. ICETET '08. First International Conference on
Conference_Location
Nagpur, Maharashtra
Print_ISBN
978-0-7695-3267-7
Electronic_ISBN
978-0-7695-3267-7
Type
conf
DOI
10.1109/ICETET.2008.95
Filename
4580114
Link To Document