Title : 
Efficient systolization of cyclic convolution for systolic implementation of sinusoidal transforms
         
        
            Author : 
Meher, Pramod Kumar
         
        
            Author_Institution : 
Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore
         
        
        
        
        
        
            Abstract : 
This paper presents an algorithm to convert composite-length cyclic convolution into a block cyclic convolution sum of small matrix-vector products, even if the co-factors of convolution-length are not mutually prime. It is shown that by using optimal short-length convolution algorithms, the block-convolution could be computed from a few short-length cyclic and cyclic-like convolutions, when one of the co-factors belongs to {2, 3, 4, 6, 8}. A generalized systolic array is derived for cyclic-like convolution, and used that for the computation of long-length convolutions. The proposed structure for convolution-length N= 2L involves nearly the same hardware and half the time-complexity as the direct implementation; and the structure for N= 4L involves sime12.5% more hardware and one-fourth the time-complexity of the latter. The structures for N=2L and N=4L, respectively, have the same and sime12.5% less area-time complexity as the corresponding existing prime-factor systolic structures, but unlike the latter type, do not involve complex input/output mapping; and could be used even if the co-factors of convolution-length are not relatively prime.
         
        
            Keywords : 
computational complexity; convolution; digital arithmetic; matrix algebra; systolic arrays; transforms; block cyclic convolution; complex input/output mapping; composite-length cyclic convolution; convolution-length co-factor; cyclic convolution systolization; matrix-vector product; prime-factor systolic structure; short-length cyclic convolution algorithm; sinusoidal transform; systolic array architecture; time complexity; Convolution; Discrete Fourier transforms; Discrete cosine transforms; Fourier transforms; Hardware; Matrix converters; Signal design; Signal processing algorithms; Systolic arrays; Very large scale integration;
         
        
        
        
            Conference_Titel : 
Application-Specific Systems, Architectures and Processors, 2008. ASAP 2008. International Conference on
         
        
            Conference_Location : 
Leuven
         
        
        
            Print_ISBN : 
978-1-4244-1897-8
         
        
            Electronic_ISBN : 
2160-0511
         
        
        
            DOI : 
10.1109/ASAP.2008.4580161