Bit true adaptive equalisation design and simulation library

This paper presents an equaliser simulation library (EQ-Lib) which has been engineered considering all the required steps in the design process of an adaptive equalisation system, from floating point system simulation and algorithm performance analysis to bit true model setup and word length fine tuning process. In this paper a fixed point adaptive equaliser using the QR decomposition based recursive least squares (RLS) algorithm is designed to illustrate the library´s capabilities. Special attention is paid to the fixed point optimisation process, where the user can choose the wordlength of the different variables in the algorithm under consideration. This flexibility makes this library suitable for equaliser design targeting both FPGA/ASIC and DSP platform implementation. The effect of these choices can be studied with the numerical stability analysis facilities provided in terms of overflows, underflows, dynamic range, and numerical value histogram distribution.