Architecture and performance of an electro-optical high speed packet switch

Author

Albertengo, G.

Author_Institution

Dept. of Electron., Politecnico di Torino, Italy

fYear

1990

fDate

24-27 Sep 1990

Firstpage

541

Abstract

A high speed packet switch based on VLSI chips and optical components is presented. The chips, located at the inputs of the switch, implement the routing algorithm, store the incoming packets, and control the access to the optical interconnection network, which connects inputs and outputs. The simulation showed that up to two packets at a time must be transmitted on the optical interconnection network from any input to achieve optimal performance. The impact of this result on the chip complexity and on the transmission scheme used in the optical part is discussed, and a possible solution is outlined

Keywords

VLSI; electro-optical devices; optical communication equipment; optical interconnections; packet switching; VLSI chips; electro-optical switch; high speed packet switch; optical components; optical interconnection network; performance; routing algorithm; simulation; switch architecture; High speed optical techniques; Logic functions; Optical devices; Optical interconnections; Optical packet switching; Optical receivers; Optical switches; Optical transmitters; Packet switching; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer and Communication Systems, 1990. IEEE TENCON'90., 1990 IEEE Region 10 Conference on

Print_ISBN

0-87942-556-3

Type

conf

DOI

10.1109/TENCON.1990.152668

Filename

152668