A novel fuzzy inference processor using trapezoidal-shaped membership function

The widespread application of fuzzy logic in various fields has been hindered by the problem of low speed of operation of fuzzy processors. Both hardware and software approaches have been adopted to increase the speed of operation of the fuzzy processors in general and inference processing in particular. To improve the inference processing, the calculation of matching degree between the fuzzified input and the antecedent membership function needs a special attention of researchers, as the calculation of matching degree always needs very high latency and limits the overall inference performance. In this paper, a novel architecture of a max-min circuit, used for calculating the matching degree between two trapezoidal-shaped membership functions has been proposed. The VHDL modeling of the proposed architecture has been performed. It has been observed that the proposed architecture is area and speed efficient in comparison to an earlier architecture using trapezoid-membership function. A 33% reduction in the number of subtractors has been obtained in the proposed architecture. The architecture has been finally implemented in the XILINX FPGA.