A 0.8 μm advanced single poly BiCMOS technology for high density and high performance applications

Author

Ilderem, Vida ; Iranmanesh, Ali ; Solheim, Alan ; Lam, Lawrence ; Blair, Chris ; Lahri, Rajeeva ; Leibiger, Steve ; Bouknight, Lyle ; Biswal, Madan ; Bastani, Bami

Author_Institution

Nat. Semicond. Corp., Puyallup, WA, USA

fYear

1990

fDate

13-16 May 1990

Abstract

A single poly, 0.8 μm BiCMOS technology having both high-performance CMOS and 14 GHz ASPECT III n-p-n transistors is described. The advanced features of this BiCMOS technology include a low encroachment, defect-free recessed oxide isolation process, self-aligned integrated well taps for MOS devices, double diffused bipolar process, silicided local interconnect, and four levels of metallization with tungsten plugs. Ring oscillator gate delays of <150 ps BiCMOS, <90 ps CMOS, and<50 ps ECL are obtained with this process. This technology is most applicable to high-performance/high-density standard cell ECL gate array circuits requiring embedded memory

Keywords

BIMOS integrated circuits; application specific integrated circuits; emitter-coupled logic; integrated circuit technology; logic arrays; 0.8 micron; 50 to 150 ps; ASIC; ASPECT III n-p-n transistors; W plug; double diffused bipolar process; embedded memory; four level metallisation; high performance applications; high-performance CMOS; polycrystalline Si; recessed oxide isolation process; self-aligned integrated well taps; silicided local interconnect; single poly BiCMOS technology; standard cell ECL gate array circuits; BiCMOS integrated circuits; CMOS technology; Integrated circuit interconnections; Isolation technology; MOS devices; Metallization; Plugs; Ring oscillators; Transistors; Tungsten;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990

Conference_Location

Boston, MA

Type

conf

DOI

10.1109/CICC.1990.124772

Filename

124772