DocumentCode :
2320598
Title :
Floating point based Cellular Automata simulations using a dual FPGA-enabled system
Author :
Murtaza, S. ; Hoekstra, A.G. ; Sloot, P. M A
Author_Institution :
Inst. for Inf., Univ. of Amsterdam, Amsterdam
fYear :
2008
fDate :
16-16 Nov. 2008
Firstpage :
1
Lastpage :
8
Abstract :
With the recent emergence of multicore architectures, the age of multicore computing might have already dawned upon us. This shift might have triggered the evolution of von Neumann architecture towards a parallel processing paradigm. Cellular Automata- inherently decentralized spatially extended systems consisting of large numbers of simple and identical components with local connectivity, also proposed by von Neumann in 1950s, is the potential candidate among the parallel processing alternatives. The spatial parallelism available on field programmable gate arrays make them the ideal platform to investigate the cellular automata systems as potential parallel processing paradigm on multicore architectures. The authors have been experimenting with this idea for quite some time now and report their progress from a single to a dual FPGA chip based cellular automata accelerator implementation. For D2Q9 Lattice Boltzmann method implementation, we were able to achieve an overall speed-up of 2.3 by moving our Fortran implementation to our single FPGA-based implementations. Further, with our dual FPGA-based implementation, we achieved a speed-up close to 1.8 compared to our single FPGA-based implementation.
Keywords :
FORTRAN; cellular automata; field programmable gate arrays; floating point arithmetic; lattice Boltzmann methods; multivariable systems; parallel processing; D2Q9 lattice Boltzmann method; Fortran implementation; cellular automata; decentralized spatially extended systems; dual FPGA-enabled system; field programmable gate arrays; floating point; multicore computing; parallel processing paradigm; von Neumann architecture; Biological system modeling; Computational modeling; Computer architecture; Content addressable storage; Field programmable gate arrays; Informatics; Lattice Boltzmann methods; Logic; Multicore processing; Parallel processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Reconfigurable Computing Technology and Applications, 2008. HPRCTA 2008. Second International Workshop on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-2826-7
Type :
conf
DOI :
10.1109/HPRCTA.2008.4745686
Filename :
4745686
Link To Document :
بازگشت