DocumentCode :
2320856
Title :
Matisse: a system-on-chip design methodology emphasizing dynamic memory management
Author :
Verkest, Diederik ; Da Silva, Julio Leao ; Ykman, Chantal ; Croes, Kris ; Miranda, Miguel ; Wuytack, Sven ; De Jong, Gjalt ; Catthoor, Francky ; De Man, Hugo
Author_Institution :
Alcatel Telecom, Antwerp, Belgium
fYear :
1998
fDate :
16-17 Apr 1998
Firstpage :
110
Lastpage :
115
Abstract :
Matisse is a design environment intended for developing systems characterized by a tight interaction between control and data-flow behavior, intensive data storage and transfer and stringent real-time requirements. Matisse bridges the gap from a system specification, using a concurrent object-oriented language, to an optimized embedded single-chip hardware/software implementation. Matisse supports stepwise exploration and refinement of dynamic memory management, memory architecture exploration, and gradual incorporation of timing constraints before going to traditional tools for hardware synthesis, software compilation, and inter-processor communication synthesis. With this approach, specifications of embedded systems can be written in a high-level programming language using data abstraction. Application of Matisse on telecom protocol processing systems in the ATM area shows significant improvements in area usage and power consumption
Keywords :
VLSI; asynchronous transfer mode; circuit CAD; data structures; integrated circuit design; object-oriented methods; protocols; real-time systems; telecommunication computing; virtual storage; ATM; Matisse design environment; data abstraction; data-flow behavior; dynamic memory management; embedded single-chip hardware/software implementation; embedded system specifications; high-level programming language; intensive data storage; intensive data transfer; memory architecture exploration; real-time requirements; system-on-chip design methodology; telecom protocol processing systems; timing constraints; Bridges; Control systems; Design methodology; Embedded software; Hardware; Memory architecture; Memory management; Real time systems; System-on-a-chip; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI '98. System Level Design. Proceedings. IEEE Computer Society Workshop on
Conference_Location :
Orlando, FL
Print_ISBN :
0-8186-8448-8
Type :
conf
DOI :
10.1109/IWV.1998.667133
Filename :
667133
Link To Document :
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