DocumentCode :
2321205
Title :
Model and measurements of a transmission line with integrated symmetrical 1-kV HBM broadband ESD Protection in advanced CMOS technologies
Author :
Lim, T. ; Jimenez, J. ; Benech, P. ; Fournier, J. -M ; Heitz, B. ; Galy, P.
Author_Institution :
STMicroelectron., Crolles, France
fYear :
2012
fDate :
24-26 Sept. 2012
Firstpage :
175
Lastpage :
177
Abstract :
Advanced CMOS technologies provide an easier way to realize radio-frequency integrated circuits (RFICs). However, transistor gates are getting smaller and electrostatic discharges (ESD) issues become more significant. Unfortunately, ESD protections parasitic capacitance limits the operating bandwidth of the RFICs. ESD protection size dimensions are also an issue to protect RFICs. This paper presents an ESD solution and model able to be implemented in an I/O pad to protect RFICs in advanced CMOS technologies.
Keywords :
CMOS integrated circuits; capacitance; electrostatic discharge; radiofrequency integrated circuits; transmission lines; ESD protection size dimension; ESD protections parasitic capacitance; I/O pad; RFIC; advanced CMOS technology; electrostatic discharge; human body model; integrated symmetrical HBM broadband; radio-frequency integrated circuit; transistor gate; transmission line; voltage 1 kV; BiCMOS integrated circuits; Broadband communication; Discharges (electric); Electrostatic discharges; Silicon; Electrostatic discharges (ESD); advanced CMOS technology; integrated; radio-frequency integrated circuit (RFIC); transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference Dresden-Grenoble (ISCDG), 2012 International
Conference_Location :
Grenoble
Print_ISBN :
978-1-4673-1717-7
Type :
conf
DOI :
10.1109/ISCDG.2012.6360027
Filename :
6360027
Link To Document :
بازگشت