• DocumentCode
    2322757
  • Title

    Active ESD protection design against cross-power-domain ESD stresses in CMOS integrated circuits

  • Author

    Chen, Shih-Hung ; Yeh, Chih-Ting

  • Author_Institution
    Circuit Design Dept., Ind. Technol. Res. Inst., Hsinchu
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    57
  • Lastpage
    60
  • Abstract
    New active ESD protection design for the interface circuits between separated power domains has been proposed and successfully verified in a 0.13-mum CMOS technology. The HBM and MM ESD robustness of the separated-power-domain interface circuits with the proposed active ESD protection design can achieve over 4 kV and 400 V, respectively.
  • Keywords
    CMOS integrated circuits; electrostatic discharge; integrated circuit design; CMOS integrated circuits; HBM; active ESD protection design; cross power domain ESD stresses; separated power domain interface circuits; size 0.13 mum; Bidirectional control; CMOS integrated circuits; CMOS technology; Clamps; Diodes; Electrostatic discharge; MOSFETs; Protection; Stress; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4745959
  • Filename
    4745959
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2322757