DocumentCode :
2323214
Title :
Iterative decoding of parallel concatenated block codes
Author :
Belkasmi, Mostafa ; Farchane, Abderrazak
Author_Institution :
ENSIAS, Rabat
fYear :
2008
fDate :
13-15 May 2008
Firstpage :
230
Lastpage :
235
Abstract :
Parallel concatenated block (PCB) codes based on two systematic block codes and an interleaver are considered. In this study BCH codes are used as component codes. At the reception an iterative decoder using Chase-Pyndiah as soft-in soft-out algorithm is designed. The effects of various component codes, interleaver size and pattern, and the number of iterations are investigated using simulations. The simulation results show that the slope of curves and coding gain are improved by increasing the number of iterations and/or the interleaver size. From the simulations we observe that the codes PCB based on BCH(127,106,7) and BCH(255,215,11) codes are respectively 1.7 dB and 2.1 dB from Shannon limit.
Keywords :
BCH codes; block codes; concatenated codes; interleaved codes; iterative decoding; BCH code; Shannon limit; interleaver size; iterative decoding; parallel concatenated block code; soft-in soft-out algorithm; Block codes; Concatenated codes; Concurrent computing; Convolutional codes; Gaussian noise; Iterative algorithms; Iterative decoding; Maximum likelihood decoding; Product codes; Turbo codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Communication Engineering, 2008. ICCCE 2008. International Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-1691-2
Electronic_ISBN :
978-1-4244-1692-9
Type :
conf
DOI :
10.1109/ICCCE.2008.4580602
Filename :
4580602
Link To Document :
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