• DocumentCode
    2323255
  • Title

    Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2n,2n+1−1,2n−1)

  • Author

    Lin, Su-Hon ; Sheu, Ming-hwa ; Wang, Chao-Hsiang ; Kuo, Yuan-Ching

  • Author_Institution
    Grad. Sch. of Eng. Sci. & Technol., Nat. Yunlin Univ. of Sci. & Technol., Douliou
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    168
  • Lastpage
    171
  • Abstract
    The moduli set M1=(2n,2n+1-1,2n-1) which is free of 2a+1 modulus is profitable to construct a high-speed residue number system (RNS). In this paper, we derive a reduced-complexity residue-to-binary conversion algorithm for M1 by using new Chinese remainder theorem (CRT). The resulting converter architecture mainly consists of carry-save adders (CSAs), modular adders and multiplexer (MUX) which is suitable for an efficient VLSI implementation. Under the same dynamic range (DR) requirement, the proposed converter design is significantly more efficient than the latest design for M1 with respect to area-time (AT), time-power (TP) and area-time-power (ATP) products. Based on UMC 0.18 um CMOS cell-based technology, the chip area for 16-bit residue-to-binary converter is only 931times931um2 and the working frequency is 135 MHz.
  • Keywords
    CMOS integrated circuits; VLSI; adders; computational complexity; convertors; residue number systems; set theory; CMOS cell-based technology; Chinese remainder theorem; area-time-power; area-time-power efficient VLSI design; carry-save adders; high-speed residue number system; modular adders; moduli set; multiplexer; reduced-complexity residue-to-binary conversion algorithm; residue-to-binary converter; size 0.18 mum; Arithmetic; CMOS technology; Cathode ray tubes; Costs; Design engineering; Digital signal processing; Hardware; Multiplexing; Signal processing algorithms; Very large scale integration; Residue Number System (RNS); VLSI design; moduli set; residue-tobinary converter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4745987
  • Filename
    4745987