A new approach for teaching computer engineering laboratory using PLDS2

Author

Hedroug, Nacer E. ; Abuelyaman, Eltayeb ; Johnson, Dean

Author_Institution

Dept. of Electr. Eng., Western Michigan Univ., Kalamazoo, MI, USA

fYear

1988

fDate

22-25 Oct 1988

Firstpage

266

Lastpage

278

Abstract

A brief overview of a development system, the Altera PLDS2 (programmable logic development system), is presented. The use of the PLDS2 in a laboratory course for digital logic design is reported to have made it possible for students to choose between TTL and CMOS-based EPLDs on the basis of cost effectiveness. The Altera PLDS2 is a complete hardware and software development system that enables the circuit designer (students) to develop an optimized code for programming the `target´ Altera EPLDs. The system allows various design input techniques for different logic design tasks. These inputs include schematic capture, netlist entry, Boolean-equations entry, and state-machine entry. Students are not restricted to just one entry method but may `mix and match´ methods to best meet the needs of the overall logic design

Keywords

development systems; educational courses; laboratories; logic arrays; logic design; teaching; Altera PLDS2; Boolean-equations entry; CMOS-based EPLDs; TTL; computer engineering laboratory; design input techniques; digital logic design; laboratory course; logic design tasks; netlist entry; optimized code; programmable logic development system; schematic capture; state-machine entry; students; teaching; Circuits; Costs; Design optimization; Education; Hardware; Laboratories; Logic design; Programmable logic arrays; Programmable logic devices; Programming;

fLanguage

English

Publisher

ieee

Conference_Titel

Frontiers in Education Conference, 1988., Proceedings

Conference_Location

Santa Barbara, CA

Type

conf

DOI

10.1109/FIE.1988.34991

Filename

34991