• DocumentCode
    2323868
  • Title

    A novel pipeline architecture for H.264/AVC CABAC decoder

  • Author

    Chang, Yuan-Teng

  • Author_Institution
    Inf. & Commun. Res. Labs., Ind. Technol. Res. Inst., Hsinchu
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    308
  • Lastpage
    311
  • Abstract
    We present a high-throughput and low-cost context adaptive binary arithmetic (CABAC) decoder for H.264/AVC. Since the CABAC decoder has strong data dependency while decoding a plurality of bins, we propose a novel pipeline architecture to speed up this operation. Based on different types of syntax elements, two approaches to improve throughput are proposed. In addition, we re-arrange the context models in memory by applying two principles in order to reduce the usage of memory space and to lower the frequency in memory access. The proposed CABAC decoder is already integrated in a H.264 decoder and is able to achieve real-time decoding for H.264/AVC high profile HD level 4.1. The implemented design can operate at 250 MHz with 35.6 k gate count under 0.18 mum silicon technology.
  • Keywords
    adaptive codes; adaptive decoding; arithmetic codes; binary codes; code standards; video coding; CABAC decoder; H.264/AVC; advanced video coding; context adaptive binary arithmetic code; frequency 250 MHz; memory space usage reduction; pipeline architecture; size 0.18 mum; syntax element; Arithmetic; Automatic voltage control; Communication industry; Context modeling; Decoding; Entropy coding; High definition video; Pipelines; Throughput; Video coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4746021
  • Filename
    4746021