• DocumentCode
    2323896
  • Title

    A new VLSI 2-D diagonal-symmetry filter architecture design

  • Author

    Chen, Pei-Yu ; Van, Lan-Da ; Reddy, Hari C. ; Lin, Chin-Teng

  • Author_Institution
    Dept. of Comput. Sci., Nat. Chiao Tung Univ., Hsinchu
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    320
  • Lastpage
    323
  • Abstract
    In this paper, we propose two new two-dimensional (2-D) IIR and FIR filter architectures for 2-D transfer function with diagonal symmetry. The presented type-I structure with diagonal symmetry has the lowest number of multipliers, and zero latency without sacrificing the number of the delay elements. Importantly, the proposed type-II IIR filter possesses high speed, local broadcast, and the same number of multipliers and latency as the type I shows at expense of a slight increment of number of delay elements.
  • Keywords
    FIR filters; IIR filters; VLSI; filters; integrated circuit design; transfer functions; 2D diagonal-symmetry filter architecture design; 2D transfer function; FIR filter architectures; IIR filter architectures; VLSI; Application specific integrated circuits; Computer architecture; Delay; Digital filters; Electronic mail; Finite impulse response filter; Frequency response; IIR filters; Transfer functions; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4746024
  • Filename
    4746024