A Flexible Bit-Stream Level Evolvable Hardware Platform Based on FPGA

Author

Yang, Huaqiu ; Chen, Liguang ; Liu, ShaoTeng ; Bu, Haixiang ; Wang, Yuan ; Lai, Jinmei

Author_Institution

ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China

fYear

2009

fDate

July 29 2009-Aug. 1 2009

Firstpage

51

Lastpage

56

Abstract

A flexible bit-stream level evolvable hardware (EHW) platform is proposed in order to efficiently utilize the programmable logic resources of FPGA when evolving digital circuits. This platform is based on the FuDan FPGA device. An adaptive variable-size look-up-table (LUT) array structure is proposed with the optimal Genetic Algorithm to evolvable circuits. The experiment results showed that the proposed platform is more flexible, and it not only can make good use of FPGA logic resources, but also has a quick evolving speed.

Keywords

field programmable gate arrays; genetic algorithms; FPGA; adaptive variable-size look-up-table array; digital circuits; evolvable circuits; flexible bit-stream level evolvable hardware platform; optimal genetic algorithm; programmable logic resources; Adaptive arrays; Digital circuits; Field programmable gate arrays; Genetic algorithms; Hardware; Logic circuits; Logic devices; Programmable logic arrays; Programmable logic devices; Table lookup; Bit-Stream Level; Evolvable Hardware; FPGA; Genetic Algorithm; LUT;

fLanguage

English

Publisher

ieee

Conference_Titel

Adaptive Hardware and Systems, 2009. AHS 2009. NASA/ESA Conference on

Conference_Location

San Francisco, CA

Print_ISBN

978-0-7695-3714-6

Type

conf

DOI

10.1109/AHS.2009.44

Filename

5325471