DocumentCode
2324520
Title
A newly high-speed equalizer for QAM signals
Author
Zhang, Meng ; Jiang, Zhixiang ; Li, Zichuang ; Huang, Cheng ; Dai, Liang
Author_Institution
Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing
fYear
2008
fDate
Nov. 30 2008-Dec. 3 2008
Firstpage
477
Lastpage
480
Abstract
A new algorithm SGD-CMA for QAM signals in high-speed equalizer is presented in this paper. SGD-CMA integrates conventional CMA and DD-LMS under stop-and-go principle. The SGD-CMA equalizer performs six times faster, with 3~5 dB better in rudimental MSE, more rapidly on capturing the channel variety than conventional CMA and almost the same error rate characteristic, while decreasing 82% of operation complexity and increasing 5% of hardware consumption. MATLAB simulations support SGD-CMA on all performance and characteristics, validating its feasibility and advantages. Finally using CMOS 0.18 mum library to synthesis, the new equalizer is embedded into DVB-C demodulation chip, and chip test result shows that the performance of the new equalizer is better.
Keywords
CMOS integrated circuits; adaptive equalisers; mean square error methods; quadrature amplitude modulation; CMOS library; DVB-C demodulation chip; MATLAB simulations; MSE; QAM signals; SGD-CMA; adaptive equalizer; constant modulus algorithm algorithm; high-speed equalizer; size 0.18 mum; stop-and-go principle; Application specific integrated circuits; Blind equalizers; Convergence; Cost function; Decision feedback equalizers; Field-flow fractionation; IIR filters; Intersymbol interference; Quadrature amplitude modulation; Systems engineering and theory;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location
Macao
Print_ISBN
978-1-4244-2341-5
Electronic_ISBN
978-1-4244-2342-2
Type
conf
DOI
10.1109/APCCAS.2008.4746064
Filename
4746064
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