DocumentCode
2324761
Title
A design of CMOS bandgap reference with low thermal drift and low offset
Author
Luo Fang-Jie ; Deng Hong-Hui ; Gao Ming-Lun
Author_Institution
Inst. of VLSI Design, Hefei Univ. of Technol., Hefei
fYear
2008
fDate
Nov. 30 2008-Dec. 3 2008
Firstpage
538
Lastpage
541
Abstract
This paper presents a high performance bandgap voltage reference, together with the discussion of the principle of the quadratic temperature compensation. The circuit utilizes two resistors made of different materials to compensate the quadratic temperature, so as to efficiently reduce the temperature drift of the bandgap voltage reference. To reduce the offset voltage, the improved design methods for circuit and layout are introduced. The cascode structure is also introduced in this bandgap voltage reference circuit to improve the power supply rejection ratio (PSRR). Finally the simulation results based on 0.35 mum CMOS process show that the temperature coefficient is 3.5 ppm/degC And after MPW manufacture and testing, the result achieves our targets.
Keywords
CMOS integrated circuits; compensation; integrated circuit layout; reference circuits; CMOS bandgap voltage reference; integrated circuit layout; offset voltage reduction; power supply rejection ratio; quadratic temperature compensation; size 0.35 mum; temperature drift reduction; CMOS process; Circuit simulation; Design methodology; Manufacturing processes; Photonic band gap; Power supplies; Resistors; Temperature; Virtual manufacturing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location
Macao
Print_ISBN
978-1-4244-2341-5
Electronic_ISBN
978-1-4244-2342-2
Type
conf
DOI
10.1109/APCCAS.2008.4746079
Filename
4746079
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