DocumentCode :
232517
Title :
The effects of CPU load & idle state on embedded processor energy usage
Author :
Daud, Shuhaizar ; Ahmad, R.B. ; Lynn, Ong Bi ; Abd Kareem, Zahereel Ishwar ; Munirah Kamarudin, Latifah ; Ehkan, P. ; Warip, Mohd Nazri Mohd ; Othman, Rozmie Razif
Author_Institution :
Network & Adv. Comput. (ENAC) Res. Group, Univ. Malaysia Perlis, Kangar, Malaysia
fYear :
2014
fDate :
19-21 Aug. 2014
Firstpage :
30
Lastpage :
35
Abstract :
Device power consumption is a serious design consideration especially for embedded systems. By reducing the power consumption of a particular system, we could effectively prolong the runtime of the system, allowing for longer operational condition of a particular system. Previous studies have suggested that the power characteristics of a modern embedded processor have since been improved with manufacturer´s implementation of better energy-focused designs. Implementation of hardware optimization such as better clock and power gating have been shown to produce better energy usage during on-load and off-load processing. In this paper we benchmarked the energy use of a modern embedded processor and study the effects of idling time to the processor and system energy usage. We have found that the processor energy use is significantly reduced in the instant that the processor goes idle during the execution process. The idling time during a processing timeslice allows the processor to use significantly less energy without explicitly depending on a frequency scaling algorithm to reduce energy consumption. This power saving feature directly implemented inside the processor hardware have the possibility to render software based frequency scaling algorithm and DVFS method to be less effective in reducing energy usage.
Keywords :
energy consumption; microprocessor chips; optimisation; power aware computing; CPU load; DVFS method; clock gating; device power consumption; embedded processor energy usage; energy consumption; energy-focused design; hardware optimization; idle state; power gating; software based frequency scaling; system energy usage; Clocks; Equations; Hardware; Mathematical model; Optimization; Power demand; Power measurement; embedded system; power estimation; power measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Design (ICED), 2014 2nd International Conference on
Conference_Location :
Penang
Type :
conf
DOI :
10.1109/ICED.2014.7015766
Filename :
7015766
Link To Document :
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