DocumentCode :
2326056
Title :
Highly-linear CMOS OTA with compensation of mobility reduction
Author :
Tanno, Koichi ; Ide, Daisuke ; Nishimura, Kazumasa ; Tanaka, Hisashi ; Tamura, Hiroki
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. of Miyazaki, Miyazaki
fYear :
2008
fDate :
Nov. 30 2008-Dec. 3 2008
Firstpage :
810
Lastpage :
813
Abstract :
This paper describes highly linear CMOS OTA with compensation of mobility reduction. The proposed OTA is circuitry of the adaptive bias based OTA with a tail current source, and can reduce the influence of the mobility reduction. Through Star-HSPICE simulations, we could confirm that the third-order harmonic (HD3) can be reduced by 26.6 dB by using the proposed technique. Lastly, as an application of the proposed OTA, we design the 6th-order 0.05deg equiripple continuous-time filter.
Keywords :
CMOS analogue integrated circuits; operational amplifiers; equiripple continuous-time filter; highly-linear CMOS OTA; mobility reduction; star-HSPICE simulations; tail current source; third-order harmonic; Active filters; Circuit simulation; Intrusion detection; Linearity; MOSFET circuits; Operational amplifiers; Power harmonic filters; Tail; Threshold voltage; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
Type :
conf
DOI :
10.1109/APCCAS.2008.4746146
Filename :
4746146
Link To Document :
بازگشت