DocumentCode :
2326183
Title :
A high performance four-parallel 128/64-point radix-24 FFT/IFFT processor for MIMO-OFDM systems
Author :
Liu, Hang ; Lee, Hanho
Author_Institution :
Sch. of Inf. & Commun. Eng., Inha Univ., Incheon
fYear :
2008
fDate :
Nov. 30 2008-Dec. 3 2008
Firstpage :
834
Lastpage :
837
Abstract :
This paper presents a novel high-speed, low-complexity 128/64-point radix-24 FFT/IFFT processor for the applications in a high-throughput MIMO-OFDM systems. The high radix radix-24 multi-path delay feed-back (MDF) FFT architecture provides a higher throughput rate and low hardware complexity by using a four-parallel data-path scheme. The proposed processor not only supports the operation of FFT/IFFT in 128 points and 64 points but can also provide a high data processing rate by using a four-parallel data-path scheme. Furthermore, the proposed design has a less hardware complexity compared with traditional 128/64-point FFT/IFFT processors. The proposed FFT/IFFT processor was implemented using Xilinx Virtex-4 FPGA. Our proposed processor achieves a considerable performance, which has a high throughput rate of up to 560 M sample/s at 140 MHz.
Keywords :
MIMO communication; OFDM modulation; digital arithmetic; fast Fourier transforms; field programmable gate arrays; logic design; pipeline processing; 4-parallel data-path pipelined 128/64- point MDF FFT/IFFT processor; Xilinx Virtex-4 FPGA; four-parallel data-path scheme; frequency 140 MHz; hardware complexity; high radix-24 multipath delay feedback; high-throughput MIMO-OFDM system; orthogonal frequency division multiplexing; Bandwidth; Costs; Delay; Fading; Field programmable gate arrays; Hardware; MIMO; OFDM; Throughput; Transceivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
Type :
conf
DOI :
10.1109/APCCAS.2008.4746152
Filename :
4746152
Link To Document :
بازگشت