Skew variation compensating technique for clock mesh networks

This paper describes a clock skew variation compensating technique for maintaining the skew amount between local clock meshes which have relative skew between them due to PVT variations and unbalanced load distribution. A skew detector that senses skew amount between clock meshes and converts it to effective logic values with a digitally controlled delay set which corrects the clock skew of the meshes enables 72% reduction in skew variation, from 160 ps to 45.2 ps.