Process simulation of Trench Gate and Plate and Trench Drain SOI NLIGBT with TCAD tools

Author

Zhang, H.P. ; Sun, L.L. ; Jiang, L.F. ; Ma, L.J. ; Lin, M.

Author_Institution

Sch. of Electron. & Inf., Hangzhou Dianzi Univ., Hangzhou

fYear

2008

fDate

Nov. 30 2008-Dec. 3 2008

Firstpage

1037

Lastpage

1040

Abstract

In this paper process simulation of a novel structural Silicon On Insulator (SOI) LIGBT cell with Trench Gate and Field Plate and Trench Drain (TGFPTD) was done in a sequence of advanced SOI CMOS processes with Silvaco TCAD. The simulated results indicate that the proposed TGFPTD SOI LIGBT cell is feasible to be fabricated in advanced SOI CMOS technologies and the vertical channel length of the vertical gate nMOSFET could be reduced to about 170 nm.

Keywords

insulated gate bipolar transistors; semiconductor process modelling; silicon-on-insulator; technology CAD (electronics); SOI CMOS technology; SOI NLIGBT; TCAD; field plate; lateral insulated gate bipolar transistors; silicon-on-insulator; trench drain; trench gate; vertical channel length; vertical gate nMOSFET; Atmosphere; CMOS process; CMOS technology; Circuit simulation; Etching; Oxidation; Resists; Semiconductor films; Silicon on insulator technology; Substrates; CMOS; LIGBT; SOI; TCAD; TGFPTD; process simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on

Conference_Location

Macao

Print_ISBN

978-1-4244-2341-5

Electronic_ISBN

978-1-4244-2342-2

Type

conf

DOI

10.1109/APCCAS.2008.4746201

Filename

4746201