DocumentCode :
2327283
Title :
The library of building blocks for an "integrate & fire" neural network on a chip
Author :
Hajtas, Daniel ; Durackova, Daniela
Author_Institution :
Dept. of Microelectronics, Slovak Univ. of Technol., Bratislava, Slovakia
Volume :
4
fYear :
2004
fDate :
25-29 July 2004
Firstpage :
2631
Abstract :
This paper is dealing with the design of a library of basic building cells for an "integrate & fire" or "spiking" neural network hardware implementation. Each cell of this library consists of transistor level schematic, mathematics model for fast system level simulations, abstracted layout for automatic layout generation and fully checked layout of the cell. The main cells: neuron and a synapse were designed according to their biological counterparts conceptually as close as possible to better mimic the real neural networks. The switched capacitor design technique was involved in the main cells to save the design area. Using this library a test chip was designed and produced and at the end of this paper few measurements are described and shown.
Keywords :
mathematical analysis; neural nets; system-on-chip; automatic layout generation; building blocks library; fast system level simulations; mathematics model; spiking neural network hardware implementation; switched capacitor design technique; transistor level schematic; Biological system modeling; Buildings; Cells (biology); Fires; Libraries; Mathematical model; Mathematics; Neural network hardware; Neural networks; Neurons;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 2004. Proceedings. 2004 IEEE International Joint Conference on
ISSN :
1098-7576
Print_ISBN :
0-7803-8359-1
Type :
conf
DOI :
10.1109/IJCNN.2004.1381062
Filename :
1381062
Link To Document :
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