Title :
Design Assistant: an expert tool for ASIC design
Author :
Bournazel, Jean-Marc ; Piednoir, Jacques-Olivier
Author_Institution :
VLSI Technol., Valbonne, France
Abstract :
The Design Assistant is an expert tool used for high-level what-if considerations from the very early stages of a design up to the point where the design capture is complete. It works on a high-level structural representation of a design so that it can be used before any logic is captured, and it supports a real top-down design approach with a refinement mechanism. Its goal is to answer questions such as: How big will this circuit be? What will the power dissipation be? Will it fit on a gate-array? Which package should I use? Should the design use one or two chips? The tool, a collection of designers´ expertise, has been built on the top of a Prolog expert system containing all the technical data and estimation rules and providing a powerful and flexible environment
Keywords :
VLSI; application specific integrated circuits; circuit layout CAD; expert systems; logic arrays; ASIC design; Design Assistant; Prolog expert system; circuit size indication; collection of designers´ expertise; expert tool; feasibility study aid; flexible environment; gate array implementation; high-level structural representation; high-level what-if considerations; power dissipation indication; power estimation; refinement mechanism; size estimation; top-down design approach; very early design stage; Application specific integrated circuits; Discrete cosine transforms; Expert systems; Frequency estimation; Libraries; Logic circuits; Logic design; Packaging; Power dissipation; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location :
Boston, MA
DOI :
10.1109/CICC.1990.124828
