DocumentCode :
2327548
Title :
A wide band and low PN PLL design for digital tuner
Author :
Shizhen, Huang ; Wei, Lin ; Gao Fenglin
Author_Institution :
Fujian key Lab. of Microelectron. & Integrated Circuits, Fuzhou Univ., Fuzhou
fYear :
2008
fDate :
Nov. 30 2008-Dec. 3 2008
Firstpage :
1140
Lastpage :
1143
Abstract :
In order to realize a wide-band and low phase noise PLL for digital tuner, the desired tuning range of the PLL describes in this paper is divided into 8 sections according to different L/C tank circuits changed by channel selection, then a coarse-tuning loop is designed in the system to automatically select the suitable one of the 8 tuning curves which have overlapped part besides a fine-tuning loop that is the traditional PLL required, yielding design tradeoffs between output amplitude, power, locking time, and other factors.
Keywords :
frequency synthesizers; integrated circuit design; phase locked loops; phase noise; tuning; L/C tank circuits; channel selection; coarse-tuning loop; digital tuner; fine-tuning loop; frequency synthesizers; phase locked loops; phase noise; tuning range; Circuit optimization; Frequency conversion; Phase locked loops; Phase noise; Switches; Tuners; Tuning; Voltage control; Voltage-controlled oscillators; Wideband; Coarse Tuning; Fine Tuning; Low Phase Noise; PLL; Wide Band; tuner;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
Type :
conf
DOI :
10.1109/APCCAS.2008.4746226
Filename :
4746226
Link To Document :
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