Design and implementation of ultra low bias current high efficiency PFM mode DC-DC boost regulator

This paper presents the design and implementation of a low voltage DC-DC asynchronous boost regulator that works in PFM (Pulse Frequency Modulation) mode. The booster is designed to supply low load condition (up to 20 mA) with high efficiency. The total bias current of the chip is only 5 μA when operating with 1 mA load and the number goes to maximum of 18 μA with maximum load condition (20 mA). The ultra low bias current enables the chip to maximize its efficiency in the entire load range. The chip features on-chip over current protection scheme and thermal protection scheme. The boost regulator is implemented in 0.5 μm BiCMOS process technology. The maximum measured efficiency of the fabricated chip is 86%.