Title :
Partitioning conditional data flow graphs for embedded system design
Author :
Auguin, M. ; Bianco, L. ; Capella, L. ; Gresset, E.
Author_Institution :
Univ. de Nice-Sophia Antipolis, Valbonne, France
Abstract :
The complexity of embedded applications increases continuously. Integration advances provides a rising range of possibilities to implement a system on a chip. The designers are faced to the difficult challenge to select the right units to implement the application functionalities so that the silicon area is minimized and the time constraints of the application are met. This paper presents an effective method to design system architectures which operates on a conditional data flow graph which is well suited to represent signal processing applications
Keywords :
circuit CAD; data flow graphs; digital signal processing chips; embedded systems; hardware-software codesign; integrated circuit design; microprocessor chips; conditional DFG partitioning; data flow graphs; embedded system design; signal processing applications; system architecture design; 3G mobile communication; Design methodology; Embedded system; Energy consumption; Flow graphs; GSM; Process design; Reduced instruction set computing; Signal processing; Space exploration;
Conference_Titel :
Application-Specific Systems, Architectures, and Processors, 2000. Proceedings. IEEE International Conference on
Conference_Location :
Boston, MA
Print_ISBN :
0-7695-0716-6
DOI :
10.1109/ASAP.2000.862404
