• DocumentCode
    2328596
  • Title

    A DC-offset-compensated, CT/DT hybrid filter with process-insensitive cutoff and low in-band group-delay variation for WLAN receivers

  • Author

    Un, Ka-Fai ; Mak, Pui-In ; Martins, R.P.

  • Author_Institution
    Analog & Mixed-Signal VLSI Lab., Univ. of Macau, Macao
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    1360
  • Lastpage
    1363
  • Abstract
    A continuous-time/discrete-time (CT/DT) hybrid channel-selection filter (CSF) with a built-in pole-controllable dc-offset canceller (DOC) for WLAN receivers is proposed. Optimized in a 90-nm CMOS process, a 4th-order CT/DT Hourglass architecture plus one frequency-extended real pole approximates the shape of a generic 5th-order pure CT (active-RC) Butterworth structure, while achieving a stable cutoff frequency (i.e., plusmn10%) without calibration and small in-band group delay variation (i.e., 34 ns). The entire CSF consumes 10.3 mW at 1.2 V. The IIP3 is +15 dBm and the 0.2-mW DOC reduces more than 50% of the DC-offset, while providing a pole controllable feature to flexibly suit the different reception modes of WLAN systems.
  • Keywords
    Butterworth filters; continuous time filters; discrete time filters; radio receivers; wireless LAN; Butterworth structure; CMOS process; CT-DT hybrid channel-selection filter; DC-offset-compensation; Hourglass architecture; WLAN receivers; continuous-time-discrete-time; frequency-extended real pole approximates; group-delay variation; process-insensitive cutoff; CMOS process; Circuits; Cutoff frequency; Delay; Electronic mail; Filters; Laboratories; Very large scale integration; Voltage; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4746281
  • Filename
    4746281