DocumentCode :
2328855
Title :
Efficient designs of flaoting-point CORDIC rotation and vectoring operations
Author :
Hsiao, Shen-Fu ; Lee, Hsin-Mau ; Cheng, Yen-Chun ; Tsai, Ming-Yu
Author_Institution :
Dept. of Comput. Sci. & Eng., Nat. Sun Yat-Sen Univ., Kaohsiung
fYear :
2008
fDate :
Nov. 30 2008-Dec. 3 2008
Firstpage :
1422
Lastpage :
1425
Abstract :
Two processor designs are presented that can compute CORDIC rotation and vectoring operations in floating-point representation. In order to achieve the required accuracy, we partition the computation into two phases: coarse and fine, and look for efficient design approaches to minimize the area cost as well as the latency. The proposed architectures can perform floating-point CORDIC in both vectoring and rotation modes, allowing them to be applied to applications that require high accuracy arithmetic computations with large data ranges, such as 3D graphics acceleration.
Keywords :
floating point arithmetic; microprocessor chips; pipeline processing; 3D graphics acceleration; CORDIC vectoring operation; floating-point CORDIC rotation; processor designs; Computer architecture; Computer science; Costs; Delay; Design engineering; Fixed-point arithmetic; Floating-point arithmetic; Graphics; High performance computing; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
Type :
conf
DOI :
10.1109/APCCAS.2008.4746297
Filename :
4746297
Link To Document :
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