Title :
An 8B/10B encoder with a modified coding table
Author :
Kim, Yong-woo ; Kang, Jin-Ku
Author_Institution :
Sch. of Electron. & Electr. Eng., Inha Univ., Incheon
fDate :
Nov. 30 2008-Dec. 3 2008
Abstract :
This paper presents a design of 8B/10B encoder with a modified coding table. The proposed encoder has been designed based on a reduced coding table with a modified disparity control block. After being synthesized using CMOS 0.18 mum process, the proposed encoder shows the operating frequency of 343 MHz and occupies the chip area of 1886 mum2 with 189 logic gates. It consumes 2.74 mW power. Compared to conventional approaches, the operating frequency is improved by 25.6% and chip area is decreased to 43%.
Keywords :
CMOS integrated circuits; encoding; logic gates; 8B/10B encoder; CMOS; frequency 343 MHz; logic gates; modified coding table; modified disparity control block; power 3.74 mW; size 0.18 mum; CMOS logic circuits; CMOS process; Clocks; Data communication; Decoding; Encoding; Frequency synthesizers; Logic gates; Optical fiber communication; Switches;
Conference_Titel :
Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
Conference_Location :
Macao
Print_ISBN :
978-1-4244-2341-5
Electronic_ISBN :
978-1-4244-2342-2
DOI :
10.1109/APCCAS.2008.4746322
