An architecture of photo core transform in HD photo coding system for embedded systems of various bandwidths

In this paper, we propose a novel architecture of photo core transform (PCT) which is used as transformation of image data into frequency domain in HD Photo, an emerging image coding system developed by Microsoft. In order to support various memory bus bandwidths used in system-on-a-chip (SoC) design, an implementation for each bandwidth can be derived based on our architecture. In addition, in order to reduce the local memory size and the traffic between the main and local memories, we propose a novel data transfer and storing scheme for PCT. The experimental results show that hardware modules corresponding to the given bus bandwidths can be reasonably derived from the proposed architecture.