Title :
Third-generation architecture boosts speed and density of field-programmable gate arrays
Author :
Hsieh, Hung-Cheng ; Carter, William ; Ja, Jason ; Cheung, Ed ; Schreifels, Steve ; Erickson, Chuck ; Freidin, Philip ; Tinkey, Liane ; Kanazawa, R.
Author_Institution :
Xilinx Inc., San Jose, CA, USA
Abstract :
Using a combination of architectural and process improvements, a third-generation family of field-programmable gate arrays (FPGAs) features up to twice the density and speed of currently-available FPGA devices. The architecture was devised to allow complete and efficient automated design implementation of FPGA-based designs, as well as maximum density and performance. This architecture is described. User-configurable on-chip static memory resources further contribute to the high integration levels available to users of the third-generation devices
Keywords :
CMOS integrated circuits; VLSI; logic arrays; CMOS; FPGAs; PLD; XC4000; Xilinx; automated design implementation; density; field-programmable gate arrays; high integration levels; logic cell arrays; maximum density; on-chip static memory resources; programmable logic devices; speed; third-generation devices; third-generation family; Boolean functions; CMOS logic circuits; Field programmable gate arrays; Flip-flops; Logic arrays; Logic devices; Logic programming; Power generation; Routing; Signal generators;
Conference_Titel :
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location :
Boston, MA
DOI :
10.1109/CICC.1990.124841
