Title :
A 200 µA duty-cycled PLL for wireless sensor nodes
Author :
Drago, Salvatore ; Leenaerts, Domine ; Nauta, Bram ; Sebastiano, Fabio ; Makinwa, Kofi ; Breems, Lucien
Author_Institution :
NXP Semicond., Eindhoven, Netherlands
Abstract :
A duty-cycled PLL operating in burst mode is presented. It is an essential building block of a moderately accurate low-power frequency synthesizer suitable for use in nodes for wireless sensor networks. Once in lock, the PLL´s frequency error is less than 0.1% (rms). Fabricated in a baseline 65 nm CMOS process, the PLL occupies 0.19 times 0.15 mm2 and draws 200 muA from a 1.3-V supply when generating a 1 GHz signal with a duty cycle of 10%.
Keywords :
CMOS integrated circuits; UHF detectors; detector circuits; frequency synthesizers; low-power electronics; phase locked loops; wireless sensor networks; CMOS process; burst mode; current 200 muA; duty cycled PLL; frequency 1 GHz; low power frequency synthesizer; size 0.15 mm; size 0.19 mm; size 65 nm; voltage 1.3 V; wireless sensor nodes; Phase locked loops; Wireless sensor networks;
Conference_Titel :
ESSCIRC, 2009. ESSCIRC '09. Proceedings of
Conference_Location :
Athens
Print_ISBN :
978-1-4244-4354-3
DOI :
10.1109/ESSCIRC.2009.5325979
