DocumentCode :
2329915
Title :
Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip
Author :
Lu, Zhonghai ; Jantsch, Axel
Author_Institution :
R. Inst. of Technol., Stockholm
fYear :
2007
fDate :
4-8 Nov. 2007
Firstpage :
18
Lastpage :
25
Abstract :
Configuring time-division-multiplexing (TDM) virtual circuits (VCs) for network-on-chip must guarantee conflict freedom for overlapping VCs besides allocating sufficient time slots to them. These requirements are fulfilled in the slot allocution phase. In the paper, we define the concept of a logical network (LN). Based on this concept, we develop and prove theorems that constitute sufficient and necessary conditions to establish conflict-free VCs. Using these theorems, slot allocation for VCs becomes a procedure of computing LNs and then assigning VCs to different LNs. TDM VC configuration can thus be predictable and correct-by-construction. We have integrated this slot allocation method into our multi-node VC configuration program and applied the program to an industrial application.
Keywords :
circuit analysis computing; network-on-chip; time division multiplexing; TDM virtual-circuit configuration; logical networks; network-on-chip; slot allocation; slot allocation phase; time-division-multiplexing virtual circuits; Bandwidth; Circuits; Delay; Job shop scheduling; Network-on-a-chip; Quality of service; Routing; Switches; Time division multiplexing; Virtual colonoscopy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 2007. ICCAD 2007. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Print_ISBN :
978-1-4244-1381-2
Electronic_ISBN :
1092-3152
Type :
conf
DOI :
10.1109/ICCAD.2007.4397238
Filename :
4397238
Link To Document :
بازگشت