DocumentCode
2330011
Title
Optimizing the design of single-stage power factor correctors
Author
Villarejo, J.A. ; Sebastián, J. ; Fernández, A. ; Hernando, M.M. ; Villegas, P.J.
Author_Institution
Dept. Tecnologia Electronica, Univ. Politecnica de Cartagena, Spain
Volume
1
fYear
2002
fDate
2002
Firstpage
231
Abstract
This paper deals with the optimization of the design of single-stage power factor correctors (S2PFC). As a result, a good trade off between current stress in semiconductors, voltage across the bulk capacitor and total inductor size has been established. The final conclusions allow us to reduce the total size of the additional inductors used by two-three times in comparison with previous implementations
Keywords
AC-DC power convertors; circuit optimisation; harmonic distortion; power conversion harmonics; power factor correction; rectifying circuits; bulk capacitor voltage; circuit design optimisation; inductor size; semiconductor current stress; single-stage power factor correctors; Capacitors; DC-DC power converters; Design optimization; Impedance; Inductors; Network topology; Reactive power; Stress; Virtual colonoscopy; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition, 2002. APEC 2002. Seventeenth Annual IEEE
Conference_Location
Dallas, TX
Print_ISBN
0-7803-7404-5
Type
conf
DOI
10.1109/APEC.2002.989252
Filename
989252
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