Title :
A real-time image recognition system using a global directional-edge-feature extraction VLSI processor
Author :
Zhu, Hongbo ; Shibata, Tadashi
Author_Institution :
Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
Abstract :
A directional-edge-feature-based real-time image recognition system has been developed. By employing a digital-pixel-sensor-embedded feature extraction VLSI processor, the delay due to the image data transfer between the image sensor and the feature extraction circuits, the most serious bottleneck in such systems, has been reduced dramatically. Parallel feature vector-generation and template-matching processor functions implemented on an FPGA further accelerate the processing speed. As a result, the latency between the image capture and the final recognition has been reduced to only 906 mus, making this system suitable for time critical applications. In addition, the capability of the system for automatic adaptation to more significant features has also been experimentally demonstrated.
Keywords :
CMOS digital integrated circuits; VLSI; digital signal processing chips; edge detection; feature extraction; field programmable gate arrays; image matching; image sensors; real-time systems; CMOS technology; FPGA; VLSI processor; automatic adaptation system; digital-pixel-sensor; global directional-edge-feature extraction; image capture; image data transfer; image sensor; parallel feature vector-generation; real-time image recognition system; template-matching processor function; Acceleration; Circuits; Data mining; Delay; Feature extraction; Field programmable gate arrays; Image recognition; Image sensors; Real time systems; Very large scale integration;
Conference_Titel :
ESSCIRC, 2009. ESSCIRC '09. Proceedings of
Conference_Location :
Athens
Print_ISBN :
978-1-4244-4354-3
DOI :
10.1109/ESSCIRC.2009.5325996