A charge pump circuit by using voltage-doubler as clock scheme

A new charge pump circuit with a clock that shows an increased clock voltage as its stage is increased is proposed in the paper. The charge pump circuit utilizes the cross-connected NMOS, voltage doubler, as a pumping stage. Each stage of the voltage-doubler provides a pair of complementary clock voltages. The clock voltage also increases as the stage of voltage doubler is increased. It shows that a voltage up to 37.85 V was obtained after eight-stage´s pumping of the circuit, through the simulation of HSpice under 0.35 mum process with 2 V of supply voltage and clock voltage.