• DocumentCode
    2330601
  • Title

    A fully-differential subthreshold SRAM cell with auto-compensation

  • Author

    Chang, Mu-Tien ; Hwang, Wei

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu
  • fYear
    2008
  • fDate
    Nov. 30 2008-Dec. 3 2008
  • Firstpage
    1771
  • Lastpage
    1774
  • Abstract
    SRAM cell stability is a major challenge in subthreshold SRAM design. In this paper, a robust, fully-differential subthreshold 10-transistors SRAM cell with auto-compensation is proposed. With the auto-compensation mechanism, the proposed cell exhibits better hold static noise margin (SNM). The cell structure also prevents storage nodes from bitline noise interference, thus improving read SNM. Moreover, better write ability is achieved by applying write assist technique. Based on UMC 90 nm CMOS technology, simulation results shows that at 200 mV supply voltage, the proposed cell has 1.22X hold SNM improvement, 2.09X read SNM improvement, and 2.03X write margin improvement compared to the conventional 6T SRAM cell.
  • Keywords
    CMOS memory circuits; SRAM chips; UMC CMOS technology; autocompensation mechanism; bitline noise interference; fully-differential subthreshold SRAM cell; size 90 nm; static noise margin; CMOS technology; Design engineering; Information systems; Inverters; Microelectronics; Noise robustness; Random access memory; Robust stability; Trigger circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. APCCAS 2008. IEEE Asia Pacific Conference on
  • Conference_Location
    Macao
  • Print_ISBN
    978-1-4244-2341-5
  • Electronic_ISBN
    978-1-4244-2342-2
  • Type

    conf

  • DOI
    10.1109/APCCAS.2008.4746384
  • Filename
    4746384