• DocumentCode
    233294
  • Title

    Ground plane influence on enhanced dynamic threshold UTBB SOI nMOSFETs

  • Author

    Sasaki, K.R.A. ; Manini, M.B. ; Martino, Joao Antonio ; Aoulaiche, Marc ; Simoen, Eddy ; Witters, L. ; Claeys, Cor

  • Author_Institution
    LSI, Univ. of Sao Paulo, Sao Paulo, Brazil
  • fYear
    2014
  • fDate
    2-4 April 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper investigates the ground plane influence on Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT) operation (VB=VG) over the conventional one (VB=0V). The ground plane in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (VB=k×VG) and the inverse eDT mode (VG=k×VB) were also considered and compared to the other configurations. The presence of the Ground Plane region in all DT configurations results in superior DC parameters like on-current/off-current ratio, a steeper subthreshold slope and a higher transconductance.
  • Keywords
    MOSFET; semiconductor device models; silicon-on-insulator; nMOSFET; ultra thin body and buried oxide FDSOI devices; Conferences; Couplings; Logic gates; MOSFET; Silicon-on-insulator; Threshold voltage; Transconductance; DTMOS; UTBB; ground plane;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Devices, Circuits and Systems (ICCDCS), 2014 International Caribbean Conference on
  • Conference_Location
    Playa del Carmen
  • Print_ISBN
    978-1-4799-4684-6
  • Type

    conf

  • DOI
    10.1109/ICCDCS.2014.7016149
  • Filename
    7016149
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=233294