Title :
Modeling and analysis of using memory management unit to improve software reliability
Author :
Chang, Shih-Jeh ; Kapauan, Prudence T Zacarias
Author_Institution :
Lucent Technol., Naperville, IL, USA
Abstract :
Voice and data convergence, voice over packets and 3G Wireless demand rapid evolvability for switching systems to succeed in the global marketplace. To succeed, a switching platform´s software architecture must be able to quickly absorb new technologies and respond to new market needs. This presents a new challenge to switching software architects because a switching platform must also be able to meet very stringent reliability requirements. One such requirement is no more than 0.5 minute per year of total downtime (i.e. better than six 9´s in total system availability) as specified in Telecordia´s GR-929-CORE. This paper establishes a framework for improving switching platform software fault tolerance while meeting the needs of fast-time-to-market via the use of a very common component of modern microprocessor called memory management unit (MMU) and provides a modeling and analytical method for evaluating different implementation alternatives. Finally, the paper presents examples based on modeling a 3G Wireless switching platform, to illustrate the effectiveness of using the proposed method. Modeling results show more than 200 times improvement can be achieved with use of MMU.
Keywords :
software architecture; software fault tolerance; software reliability; telecommunication computing; memory management unit; reliability requirements; software fault tolerance; switching software; switching systems; Application software; Availability; Hardware; Memory management; Microprocessors; Operating systems; Redundancy; Software measurement; Software reliability; Switching systems;
Conference_Titel :
Software Reliability Engineering, 2001. ISSRE 2001. Proceedings. 12th International Symposium on
Print_ISBN :
0-7695-1306-9
DOI :
10.1109/ISSRE.2001.989462