• DocumentCode
    2333688
  • Title

    A defect-tolerant design for WSI interconnection networks and its application to hypercube

  • Author

    Ito, Hideo

  • Author_Institution
    Dept. of Inf. & Comput. Sci., Ciuba Univ., Japan
  • fYear
    1993
  • fDate
    27-29 Oct 1993
  • Firstpage
    80
  • Lastpage
    87
  • Abstract
    A defect-tolerant design for WSI interconnection networks (INs) is proposed, and three schemes with different switch structures are examined. Open defects on wiring lines and short defects between adjacent two wiring lines in links are assumed for defects in INs. The basic idea of the proposed design is to add redundant wiring lines and switches into each physical link. The three schemes are compared by evaluating yields when they are applied to hypercube networks. As a result, one scheme is superior to others, and an effect of defect-tolerant design by the scheme is effective and useful for six and eight dimensional hypercubes
  • Keywords
    wafer-scale integration; WSI interconnection networks; defect-tolerant design; hypercube; open defects; redundancy; short defects; switch structures; wiring lines; yields; Application software; Computer networks; Electronic mail; Hypercubes; Intelligent networks; Multiprocessor interconnection networks; Parallel processing; Switches; Wafer scale integration; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1993., The IEEE International Workshop on
  • Conference_Location
    Venice
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-3502-9
  • Type

    conf

  • DOI
    10.1109/DFTVS.1993.595652
  • Filename
    595652