Search of a needle in Haystack : Analysis and reliability of nanoelectronic devices

The device progression through scaling towards nanometer regime was the result of the constant efforts and development in failure analysis through decades, which also helped the wafer fab process industry in many facets for tools and integration. This continuous improvement in the device area which has coined the term Building in Reliability (BIR) during the late 1990s [3] has taken a new turn in the sub-lOOnm devices. The importance of process integration and the advent of usage of many different types of materials for the process have resulted in a new phase to BIR. Also, the evolution has varied much as 3D devices and many forms integrated devices became reality. The challenges for analysis and the emerged solutions to improve the reliability also progressed hand in hand which was the new face of BIR in the last decade.